메뉴 건너뛰기




Volumn , Issue , 1999, Pages 304-309

Second generation programmable artificial retina

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; PATTERN RECOGNITION;

EID: 84920358066     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASIC.1999.806524     Document Type: Conference Paper
Times cited : (36)

References (14)
  • 2
    • 0002258853 scopus 로고
    • An addressable 256x256 photodiode image sensor array with an 8-bit digital output
    • C. Itinsson et al., "An addressable 256x256 photodiode image sensor array with an 8-bit digital output", Analog Integrated Circuits and Signal Processing, 4:37-49, 1993.
    • (1993) Analog Integrated Circuits and Signal Processing , vol.4 , pp. 37-49
    • Itinsson, C.1
  • 5
    • 0027624863 scopus 로고
    • A program-mable artificial retina
    • T. M. Bemard, B. Y. Zavidovique, and F. J. Devos, "A program-mable artificial retina", IEEE JSSC, 28(7):789-798, 1993.
    • (1993) IEEE JSSC , vol.28 , Issue.7 , pp. 789-798
    • Bemard, T.M.1    Zavidovique, B.Y.2    Devos, F.J.3
  • 6
    • 35649026816 scopus 로고
    • Vision chips - Implementing vision algorithms with analog VLSI circuits
    • C. Koch and H. Li, ed., VISION CHIPS - Implementing Vision Algorithms with Analog VLSI Circuits, IEEE Comp. Soc. Press, 1995.
    • (1995) IEEE Comp. Soc. Press
    • Koch, C.1    Li, H.2
  • 7
    • 0032025848 scopus 로고    scopus 로고
    • A 16x16 cellular neural network universal chip: The first complete single-chip dynamic computer array with distributed memory and with gray-scale input-output
    • J. M. Cruz and L. O. Chua, "A 16x16 cellular neural network universal chip: The first complete single-chip dynamic computer array with distributed memory and with gray-scale input-output", Analog Integrated Circuits and Signal Processing, 15(3):227-237, 1998.
    • (1998) Analog Integrated Circuits and Signal Processing , vol.15 , Issue.3 , pp. 227-237
    • Cruz, J.M.1    Chua, L.O.2
  • 8
    • 0030241068 scopus 로고    scopus 로고
    • VLSI implementation of a focal plane image processor - A realization of the near-sensor image processing concept
    • J. -E. Eklund, C. Svcnsson, and A. Astrom, VLSI implementation of a focal plane image processor - a realization of the near-sensor image processing concept. IEEE 'Iran, on VLSI Systems, 4(3):322-335, 1996.
    • (1996) IEEE 'Iran, on VLSI Systems , vol.4 , Issue.3 , pp. 322-335
    • Eklund, J.-E.1    Svcnsson, C.2    Astrom, A.3
  • 9
    • 0002458710 scopus 로고    scopus 로고
    • A CMOS vision chip with simd processing clement array for 1ms image processing
    • M. Ishikawa et al., "A CMOS vision chip with SIMD processing clement array for 1ms image processing", Digest of Tech. Papers, ISSCC, pp 206-207, 1999.
    • (1999) Digest of Tech. Papers, ISSCC , pp. 206-207
    • Ishikawa, M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.