Mapping time-critical safety-critical cyber physical systems to hybrid FPGAs

Proceedings - 2nd IEEE International Conference on Cyber-Physical Systems, Networks, and Applications, CPSNA 2014

Volumn , Issue , 2014, Pages 31-36

  Vipin, Kizheppatt ^a   Shreejith, Shanker ^a   Fahmy, Suhaib A ^a   Easwaran, Arvind ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROGRAMS; CONTROL SYSTEMS; CYBER PHYSICAL SYSTEM; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); PARALLEL PROCESSING SYSTEMS; SAFETY ENGINEERING;

BANDWIDTH REDUCTIONS; CYBER PHYSICAL SYSTEMS (CPSS); DISTRIBUTED PROCESSING; ELECTRONIC CONTROL UNITS; MULTIPLE FUNCTION; RECONFIGURABLE FABRICS; SAFETY-CRITICAL FUNCTIONS; SENSOR PROCESSING;

EMBEDDED SYSTEMS;

EID: 84916608640     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CPSNA.2014.14     Document Type: Conference Paper

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