Slowing of Moore's law signals the beginning of Smart Everything

European Solid-State Circuits Conference

Volumn , Issue , 2014, Pages 7-8

  Sutardja, Sehat ^a  

^a MARVELL SEMICONDUCTOR INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COST REDUCTION;

BULK TRANSISTORS; CMOS TECHNOLOGY; DEVICE-SCALING; DOUBLE PATTERNING; LOGIC PROCESS; MULTI PATTERNING; OPTICAL WAVELENGTH; TRANSISTOR SCALING;

TRANSISTORS;

EID: 84909952256     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2014.6942013     Document Type: Conference Paper

References (0)