0.15um leff buried channel PFET device design

European Solid-State Device Research Conference

Volumn 13-15 Sept. 1999, Issue , 1999, Pages 536-539

  Rengarajan, R ^a   Weybright, M ^b   Faltermeier, J ^b   Butt, S ^a   Lee, H ^a   Slisher, D ^b   Ronsheim, P ^b   Murphy, C S ^b   Dellow, M ^a   Divakaruni, R ^b  

^a Siemens Microelectronics Inc   (United States)

^b IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BURIED CHANNELS; DEVICE DESIGN; SHALLOW EXTENSION; SHORT CHANNELS;

EID: 84907899598     PISSN: 19308876     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. L. Nesbit et al., IEDM Technical Digest, p. 627, 1993.
2. Y. Taur et al., IEEE Electron Device Lett., voLl3, p. 267, 1992
3. F.M. Klaassen, IJ. Bastiaens, W. Hes, M. Sprokel, IEDM Technical Digest, p. 613, 1984.
4. C.S. Murthy, R. Rengaraj an, IBM Internal Report, April, 1999
5. A. Chatterjee et al., IEDM Technical Digest, p. 777, 1998.