Capacitance degradation due to fringing field in deep sub-micron MOSFETs with high-K gate dielectrics

European Solid-State Device Research Conference

Volumn 13-15 Sept. 1999, Issue , 1999, Pages 160-163

  Inani, A ^a   Rao, V R ^b   Cheng, B ^c   Zeitzoff, P ^d   Woo, J C S ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b INDIAN INSTITUTE OF TECHNOLOGY BOMBAY   (India)

^c MOTOROLA INC   (United States)

^d SEMATECH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; DIELECTRIC DEVICES; MOSFET DEVICES;

DEEP SUB-MICRON; ELECTRICAL PERFORMANCE; FRINGING FIELDS; GATE LEAKAGES; HIGH-K GATE DIELECTRICS; MOSFETS;

GATE DIELECTRICS;

EID: 84907889526     PISSN: 19308876     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. S.H. Lo, et al., IEDM Tech. Dig., p. 63, 1995.
2. A. Inani, et al., SSDM, p. 94, 1998.
3. ATLAS User's Manual, Silvaco Interational, Santa Clara, CA, USA.
4. Field Computation by Moment Methods', Roger F. Ha-rington, The MacMillan Co.
5. MATLAB, The Math Works, Inc., MA, USA.