A Column-Row-Parallel ASIC architecture for 3D wearable/portable medical ultrasonic imaging

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2014, Pages

  Chen, Kailiang ^a   Lee, Hae Seung ^a   Sodini, Charles G ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

VLSI CIRCUITS;

ASIC ARCHITECTURE; ASSEMBLY YIELDS; MEDICAL ULTRASONIC IMAGING; MEDICAL ULTRASOUND; PARALLELIZATIONS; PROGRAMMING TIME; SOURCE FOLLOWERS; TRANSDUCER ELEMENTS;

ULTRASONIC IMAGING;

EID: 84905652754     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2014.6858445     Document Type: Conference Paper

References (4)

1. A. Bhuyan, et al., "3D volumetric ultrasound imaging w/a 32x32 CMUT array w/front-end ICs using flip-chip bonding," ISSCC13'
2. B.H. Kim, et al., "Hybrid volume beamforming for 3D ultrasound imaging using 2D CMUT arrays," IEEE Ultrasonics Symposium12'
3. C.H. Seo, et al., "A 256x256 2D array transducer with row-column addressing for 3D rectilinear imaging," IEEE UFFC09'
4. K. Chen, et al., "Ultrasonic Imaging Transceiver Design for CMUT: A 3-Level 30Vpp Pulse-Shaping Pulser with Improved Efficiency and a Noise-Optimized Receiver," IEEE JSSC13'