Aladdin: A pre-RTL, power-performance accelerator simulator enabling large design space exploration of customized architectures

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2014, Pages 97-108

  Shao, Yakun Sophia ^a   Reagen, Brandon ^a   Wei, Gu Yeon ^a   Brooks, David ^a  

^a HARVARD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; SYSTEM-ON-CHIP;

ACCURATE TIMING; DATA PATHS; ITS APPLICATIONS; LARGE DESIGNS; MEMORY HIERARCHY; MODEL FRAMEWORK; SYSTEM-ON-CHIP SIMULATIONS; TRADITIONAL ARCHITECTURE;

ACCELERATION;

EID: 84905487457     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCA.2014.6853196     Document Type: Conference Paper

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