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Volumn 2031 LNCS, Issue , 2001, Pages 343-357

Automated test generation from timed automata

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATA THEORY; EQUIVALENCE CLASSES; INTERACTIVE COMPUTER SYSTEMS; MODEL CHECKING; SPECIFICATIONS; JAVA PROGRAMMING LANGUAGE; SOFTWARE TESTING;

EID: 84903139022     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-45319-9_24     Document Type: Conference Paper
Times cited : (48)

References (28)
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  • 3
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    • (1996) 1997 IEEE Real-Time Systems Symposium, RTSS'97
    • Bouajjani, A.1    Tripakis, S.2    Yovine, S.3
  • 8
    • 0141748313 scopus 로고    scopus 로고
    • Testing timing behaviors of real time software
    • San Francisco, USA., April-May 1997
    • V Braberman, M. Felder, and M. Marré. Testing Timing Behaviors of Real Time Software. In Quality Week 1997. San Francisco, USA., pages 143-155, April-May 1997 1997.
    • (1997) Quality Week 1997 , pp. 143-155
    • Braberman, V.1    Felder, M.2    Marré, M.3
  • 13
    • 0012035918 scopus 로고
    • Testing equivalence as a bisimulation equivalence
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    • Cleaveland, R.1    Hennessy, M.2
  • 14
    • 0030414046 scopus 로고    scopus 로고
    • Reducing the number of clock variables of timed automata
    • Washington, DC, USA, december, IEEE Computer Society Press
    • Conrado Daws and Sergio Yovine. Reducing the Number of Clock Variables of Timed Automata. In 1996 IEEE Real-Time Systems Symposium, RTSS '96, Washington, DC, USA, december 1996. IEEE Computer Society Press.
    • (1996) 1996 IEEE Real-Time Systems Symposium, RTSS '96
    • Daws, C.1    Yovine, S.2
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  • 17
    • 0006202814 scopus 로고    scopus 로고
    • Automated test generation from sdl specifications
    • 21-25 June, Montral, Qubec, Canada
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    • (1999) Ninth SDL Forum
    • Kerbrat, A.1    Jéron, T.2    Groz, R.3
  • 18
    • 0031357735 scopus 로고    scopus 로고
    • Efficient verification of real-time systems: Compact data structures and state-space reduction
    • Kim G. Larsen, Fredrik Larsson, Paul Petterson, and Wang Yi. Efficient Verification of Real-Time Systems: Compact Data Structures and State-Space Reduction. In 18th IEEE Real-Time Systems Symposium, pages 14-24, 1997.
    • (1997) 18th IEEE Real-Time Systems Symposium , pp. 14-24
    • Larsen, K.G.1    Larsson, F.2    Petterson, P.3    Yi, W.4
  • 20
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    • Generating test cases for real-time systems from logic specifications
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    • (1995) ACM Transactions on Computer Systems , vol.13 , Issue.4 , pp. 365-398
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  • 22
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.