FPGA implementation of an Adaptable-Size neural network

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1112 LNCS, Issue , 1996, Pages 383-388

  Pérez Uribe, Andrés ^a   Sanchez, Eduardo ^a  

^a EPFL   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

NEURAL NETWORKS; IMAGE SEGMENTATION;

COMPUTATIONAL ELEMENTS; FAST NEURAL NETWORKS; FLEXIBLE ADAPTABLE-SIZE TOPOLOGIES; FPGA IMPLEMENTATIONS; INTERCONNECTION STRUCTURE; MASSIVELY PARALLELS; NEURAL NETWORK MODEL; PARALLEL PROCESSING;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 84902198649     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-61510-5_67     Document Type: Conference Paper

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