Optimization of quasi-diagonal matrix-vector multiplication on GPU

International Journal of High Performance Computing Applications

Volumn 28, Issue 2, 2014, Pages 183-195

  Yang, Wangdong ^a,b,c   Li, Kenli ^a,b,c   Liu, Yan ^b   Shi, Lin ^b,c   Wan, Lanjun ^b,c  

^a HUNAN CITY UNIVERSITY   (China)

^b HUNAN UNIVERSITY   (China)

^c National Supercomputing Centre in Changsha   (China)

Author keywords

compute unified device architecture (CUDA); Graphics processing unit (GPU); quasi diagonal matrix; sparse matrix; sparse matrix vector multiplication (SpMV)

Indexed keywords

COMPRESSION RATIO (MACHINERY); COMPUTER GRAPHICS; DIFFERENTIAL EQUATIONS; LINEAR ALGEBRA; PARALLEL ARCHITECTURES; PROGRAM PROCESSORS;

COMPUTE UNIFIED DEVICE ARCHITECTURE(CUDA); GRAPHICS PROCESSING UNIT; QUASI-DIAGONAL MATRICES; SPARSE MATRICES; SPARSE MATRIX-VECTOR MULTIPLICATION;

COMPUTER GRAPHICS EQUIPMENT;

EID: 84900536807     PISSN: 10943420     EISSN: 17412846     Source Type: Journal    
DOI: 10.1177/1094342013501126     Document Type: Article

References (29)

1. Baskaran MM, Bordawekar R Optimizing sparse matrix-vector multiplication on GPUs using compile-time and run-time strategies. 2008 :
2. Bell N, Garland M 2008 :
3. Boyer B, Dumas J-G, Giorgi P Proceedings of the 4th international workshop on parallel and symbolic computation (PASCO'10). NY: New York ; 2010 July 2010: 80-88.
4. Buatois L, Caumon G, Levy B High performance computing and communications - third international conference (HPCC'07). 2010: 358-371.
5. Cevahir A, Nukada A, Matsuoka S Proceedings of the international conference on computational science (ICCS'09). LA: Baton Rouge ; 2009 May 2009: 893-903.
6. Choi JW, Singh A, Vuduc RW Proceedings of the 15th ACM SIGPLAN annual symposium on principles and practice of parallel programming (PPoPP'10). India: Bangalore ; 2010 January 2010: 115-126.
7. Dehnavi MM, Fernandez DM, Giannacopoulos D.. Finite element sparse matrix vector multiplication on graphic processing units. IEEE Transactions on Magnetics. 2010 ; 46 (8). 2982-2985
8. Feng X, Jin H, Zheng R, et al Proceedings of the 2011 IEEE 17th international conference on parallel and distributed systems (ICPADS2011). 2011: 165-172.
9. Fujimoto N Proceedings of IEEE international symposium on parallel and distributed processing (IPDPS'08). FL: Miami ; 2008 April 2008: 1-8.
10. Guo D, Gropp W. Optimizing sparse data structures for matrix-vector multiply. International Journal of High Performance Computing Applications. 2011 ; 25 (1). 115-131
11. HarrisM (2007) Optimizing parallel reduction in CUDA. NVIDIA Developer Technology. Available at:http://developer.download.nvidia.com/assets/cuda/files/ reduction.pdf(accessed 11 September 2012).
12. Hugues MR, Petiton SG Proceedings of 12th IEEE international conference on high performance computing and communications (HPCC'10). Australia: Melbourne ; 2010 September 2010: 122-129.
13. Karakasis V, Goumas G, Koziris N Proceedings of the 2009 international conference on parallel processing (ICPP'09). Austria: Vienna ; 2009 September 2009: 356-364.
14. Li K, et al. Parallelization methods for implementation of discharge simulation along resin insulator surfaces. Computers & Electrical Engineering. 2011 ; 37 (1). 30-40
15. Monakov A, Lokhmotov A, Avetisyan A Proceedings of international conference on high-performance and embedded architectures and compilers (HiPEAC'10). Italy: Pisa ; 2010 July 2010: 111-115.
16. NVIDIA (2013) A library for sparse linear algebra and graph computations on CUDA (CUSP), 3rd ed. Available at: https://github.com/cusplibrary/ cusplibrary(accessed 11 September 2012).
17. NVIDIA (2012a) CUDA Toolkit 4.2 CUBLAS Library, 4th ed. Available at: http://docs.nvidia.com/cuda/cublas/index.html (accessed 11 September 2012).
18. NVIDIA (2012b) The NVIDIA CUDA sparse matrix library (cuSPARSE), 2nd ed. Available at: http://docs.nvidia.com/cuda/cusparse/index.html (accessed 11 September 2012).
19. Ohshima S, Kise K, Katagiri T, et al Proceedings of 7th international meeting on high performance computing for computational science (VECPAR'06). 2006: 305-318.
20. Pichel JC, Rivera FF, Fernández M, et al. Optimization of sparse matrix-vector multiplication using reordering techniques on GPUs. Microprocessors and Microsystems. 2012 ; 36 (2). 65-77
21. Ries F, De Marco T, Guerrieri R. Tuning solution of large non-Hermitian linear systems on multiple graphics processing unit accelerated workstations. International Journal of High Performance Computing Applications. 2012 ; 26 (3). 296-309
22. SaadY. (2005) Sparskit: a basic tool-kit for sparse matrix computations, version 2. Available at: http://www-users.cs.umn.edu/saad/software/SPARSKIT/ sparskit.html (accessed 11 September 2012).
23. Shahingohar A, Eagleson R. A framework for GPU accelerated deformable object modeling. International Journal of High Performance Computing Applications. 2011 ; 26 (3). 203-214
24. Shan Y, Wu T, Wang Y, et al Proceedings of IEEE 8th symposium on application specific processors (SASP'10). 2010: 67-70.
25. University of Florida (2011) UF sparse matrix collection. Available at: http://www.cise.ufl.edu/research/sparse/matrices/groups.html (accessed 11 September 2012).
26. Vázquez F, Ortega G, Fernández JJ, et al Proceedings of IEEE international conference on computer and information technology (CIT'10). 2010: 1146-1151.
27. Vuduc R, Chandramowlishwaran A, Choi J, et al Proceedings of the 2nd USENIX conference on hot topics in parallelism (HotPar'10). 2010: 13-13.
28. Xiaoyong T, Li K, Zeng Z, et al. A novel security-driven scheduling algorithm for precedence-constrained tasks in heterogeneous distributed systems. IEEE Transactions on Computers. 2011 ; 60 (7). 1017-1029
29. Xintian Y, Parthasarathy S, Sadayappan P. Fast sparse matrix-vector multiplication on GPUs: implications for graph mining. Proceedings of the VLDB Endowment. 2011 ; 4 (4). 231-242