Multiple oscillator frequency synthesizer with common phase lock loop

12th International Conference on Microwaves and Radar, MIKON 1998

Volumn 3, Issue , 1998, Pages 833-837

  Rokita, A ^a  

^a Przemysłowy Instytut Telekomunikacji SA   (Poland)

Author keywords

[No Author keywords available]

Indexed keywords

LOCKS (FASTENERS); MICROWAVE CIRCUITS; MICROWAVES; PHASE LOCKED LOOPS; PHASE NOISE; RADAR;

FREQUENCY CHANNELS; FREQUENCY SOURCE; MICROWAVE CIRCUITRY; MICROWAVE SWITCH; MULTIPLE OUTPUTS; OSCILLATOR DESIGN; PHASE LOCK LOOP (PLL); PHASE NOISE PERFORMANCE;

MICROWAVE OSCILLATORS;

EID: 84900513156     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MIKON.1998.742836     Document Type: Conference Paper

References (6)

1. A. B. Przedpelski: PLL Primer. RF Design, May/June 1983, pp12a28.
2. L. Hoberg: The Signal Generator-An Introduction to the Selection Process. Test & Measurement World, vol. 4. no 9, Sept. 1984, pp 54+65.
3. B. G. Goldberg, H. Eisenson: Frequency Synthesizer Strategies for Wireless. Microwave Journal, vol. 36 no 6, June 1993, pp 24+40.
4. R. W. Rhea: Oscillator Design & Computer Simulation. Prentice Hall, 1990.
5. R. B. Shields: Review of the Specification and Measurement of Short Term Stability. Microwave Journal, vol. 12 no 6, June 1969, pp 49a55.
6. Qualcomm Technical Data Sheet, 43216: 1. 6 GHz Low Power PLL Frequency Synthesizer.