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Volumn 57, Issue , 2014, Pages 168-169
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A 1.3mW 0.6V WBAN-compatible sub-sampling PSK receiver in 65nm CMOS
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Author keywords
[No Author keywords available]
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Indexed keywords
ANALOG TO DIGITAL CONVERSION;
NETWORK ARCHITECTURE;
SIGNAL PROCESSING;
SILICON;
BUILDING BLOCKES;
HETERODYNE RECEIVERS;
LOW-POWER TECHNOLOGY;
LOW-VOLTAGE;
PSK RECEIVERS;
SILICON AREA;
SUB-SAMPLING;
SUPPLY VOLTAGES;
LOW POWER ELECTRONICS;
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EID: 84898075139
PISSN: 01936530
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ISSCC.2014.6757385 Document Type: Conference Paper |
Times cited : (16)
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References (4)
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