A systematic incrementalization technique and its application to hardware design

International Journal on Software Tools for Technology Transfer

Volumn 4, Issue 2, 2003, Pages 211-223

  Johnson, Steven D ^a   Liu, Yanhong A ^b   Zhang, Yuchen ^c  

^a INDIANA UNIVERSITY   (United States)

^b Stony Brook University   (United States)

^c MOTOROLA INC   (United States)

Author keywords

Design derivation; Floating point operations; Formal methods; Formal synthesis; Hardware verification; Transformational programming

Indexed keywords

FLOATING POINT OPERATIONS; FORMAL SYNTHESIS; HARDWARE SPECIFICATIONS; HARDWARE VERIFICATION; IMPROVEMENT TECHNIQUE; PROGRAM OPTIMIZATION; SQUARE-ROOT ALGORITHMS; TRANSFORMATION METHODS;

FORMAL METHODS; HARDWARE; THEOREM PROVING;

ITERATIVE METHODS;

EID: 84896692960     PISSN: 14332779     EISSN: 14332787     Source Type: Journal    
DOI: 10.1007/s100090100067     Document Type: Article

References (25)

1. Bose, B.: DDD-FM9001: Derivation of a Verified Microprocessor. PhD thesis, Computer Science Department, Indiana University, USA, December 1994. www.cs.indiana.edu/ftp/techreports/TR456.html.
2. Bose, B., Johnson, S.D.: DDD-FM9001: Derivation of a verified microprocessor. an exercise in integrating verification with formal derivation. In: Milne, G., Pierre, L. (eds): Proceedings of IFIP Conference on Correct Hardware Design and Verification Methods, pp. 191-202. Springer, LNCS 683, 1993.
3. Greve, D.A.: Symbolic simulation of the JEM1m icroprocessor. In: Gopalakrishnana, G., Windley, P. (eds): Formal Methods in Computer Aided Design (FMCAD'98), vol. 1522 of Lecture Notes in Computer Science, pp. 321-333. Springer, 1998.
4. Gries, D. Compiler Construction for Digital Computers. John Wiley & Sons, New York, 1971.
5. Gries, D. The Science of Programming. New York, Springer- Verlag, 1981.
6. Johnson, S.D.: Applicative programming and digital design. In: Proc. Eleventh Annual ACM SIGACT-SIGPLAN Symposium on Principles of Programming (POPL'84), pp. 218-227, 1984.
7. Johnson, S.D., Bose, B.: A system for mechanized digital design derivation. In: IFIP and ACM/SIGDA International Workshop on Formal Methods in V LSI Design, 1991. Available as Indiana University Computer Science Department Technical Report No. 323 (rev. 1997).
8. Johnson, S.D., Miner, P.S.: Integrated reasoning support in system design: design derivation and theorem proving. In: Li, H.F., Probst, D.K. (eds): Advances in Hardware Design and Verification, pp. 255-272. Chapman-Hall, 1997. Proceedings of CHARME'97.
9. Jones, B.B., Skakkebaek, J.U., Dill D.L.: Reducing manual abstraction in formal verification of out-of-order execution. In: Gopalakrishnana, G., Windley, P. (eds): Formal Methods in Computer Aided Design (FMCAD'98), vol. 1522 of Lecture Notes in Computer Science, pp. 2-17. Springer, 1998.
10. Klarlund, N., Møller, A.: MONA Version 1.4 User Manual. BRICS Notes Series NS-01-1, Department of Computer Science, University of Aarhus, January 2001.
11. Liu, Y.A.: CACHET: An interactive, incremental-attributionbased program transformation system for deriving incremental programs. In: Proceedings of the 10th Knowledge-Based Software Engineering Conference, pp. 19-26, Boston, Massachusetts, Los Alamitos, Calif., IEEE CS Press, November 1995.
12. Liu, Y.A.: Principled strength reduction. In: Bird, R., Meertens, L. (eds): Algorithmic Languages and Calculi, pp. 357-381. London, U.K., Chapman & Hall, 1997.
13. Liu, Y.A., Stoller, S.D.: From recursion to iteration: what are the optimizations? In: Procedings of the ACM SIGPLAN 2000 Workshop on Partial Evaluation and Semmantics-based Program Manipulation (PEPM'00). Boston, Massachusetts, ACM Press, January 22-23, 2000.
14. Liu, Y.A., Stoller, S.D., Teitelbaum, T.: Discovering auxiliary information for incremental computation. In: Conference Record of the 23rd Annual ACM Symposium on Principles of Programming Languages, pp. 157-170, St. Petersburg Beach, Florida, New York, ACM, January 1996.
15. Liu, Y.A., Stoller, S.D., Teitelbaum, T.: Static caching for incremental computation. ACM Trans. Program. Lang. and Syst., 20(2):1-40, March 1998.
16. Liu, Y.A., Teitelbaum, T.,: Systematic derivation of incremental programs. Sci. Comput. Program., 24(1):1-39, February 1995.
17. Liu, Y.A.: Incremental Computation: A Semantics-Based Systematic Transformational Approach. PhD thesis, Department of Computer Science, Cornell University, Ithaca, New York, January 1996.
18. Miner, P.S.: Hardware Verification using Coinductive Assertions. PhD thesis, Computer Science Department, Indiana University, USA, 1990. www.cs.indiana.edu/ftp/techreports/TR510.html.
19. Moore, J.S.: Symbolic simulation: an ACL2 approach. In: Gopalakrishnana, G., Windley, P. (eds): Formal Methods in Computer Aided Design (FMCAD'98), vol. 1522 of Lecture Notes in Computer Science, pp. 334-350. Springer, 1998.
20. O'Leary, J., Leeser, M., Hickey, J., Aagaard, M.: Nonrestoring integer square root: A case study in design by principled optimization. In: Kumar, R., Kropf, T. (eds): Proceedings of the 2nd International Conference on Theorem Provers in Circuit Design: Theory, Practice, and Experience, vol. 901of Lecture Notes in Computer Science, pp. 52-71, Bad Herrenalb (Black Forest), Germany, Berlin, Springer-Verlag, September 1994.
21. Owre, S., Rushby, J.M., Shankar, N.: PVS: A prototype verification system. In: Kapur, D. (ed): 11th International Conference on Automated Deduction (CADE), vol. 607 of Lecture Notes in Artificial Intelligence, pp. 748-752, Saratoga, NY, Springer-Verlag, June 1992.
22. Pugh, W.: A practical algorithm for exact array dependence analysis. Commun. ACM, 35(8):102-114, August 1992.
23. Wand, M.: Continuation-based program transformation strategies. Journal of the ACM, 27:164-180, 1980.
24. Wand, M. Induction, Recursion and Programming. North Holland, 1980.
25. Windley, P., Aagard, M., Leeser, M.: Towards a super duper hardware tactic. In: Joyce, J.J., Seger, C. (eds): Higher-Order Logic Theorem Proving and its Applications, vol. 780 of Lecture Notes in Computer Science. Springer-Verlag, August 1993.