Packaging challenges in miniaturization

Ambient Intelligence

Volumn , Issue , 2005, Pages 327-348

  Kallmayer, C ^a   Niedermayer, M ^a   Guttowski, S ^a   Reichl, H ^a  

^a FRAUNHOFER IZM   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84895344338     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1007/3-540-27139-2_15     Document Type: Chapter

References (13)

1. C. Landesberger et al. "New Dicing and Thinning Concept Improves Mechanical Reliability of Ultra Thin Silicon", Int. Symp. and Exhibition on Materials, Braselton, Georgia, March 2001.
2. S. Nieland et al., "Immersion Soldering - a New Way for Ultra Fine Pitch Bumping", Proc. of Electronic Goes Green 2000 Conference, Berlin, Germany, 2000, pp. 165-167.
3. B. Pahl et al., "A Thermode Bonding Process for Fine Pitch Flip Chip Applications Down to 40 Micron", Proc. EMAP, Korea, 2001.
4. R. Aschenbrenner et al., "Evaluation of Adhesive Flip Chip Bonding on Flexible Substrates", Proc. Flexcon'97, Sunnyvale, 1997.
5. Alien technology corporation: Fluidic self assembly; www.alientechnology. com/mambo alien/library/pdf/fsa white paper.pdf.
6. C. Kallmayer et al., "New Assembly Technologies for Textile Transponder Systems", Proc. 53rd ECTC, New Orleans, 2003.
7. R. Filion, R. Wojnarowski, T. Gorcyzca, B. Wildi, H. Cole; "Development of a Plastic Encapsulated Multichip Technology for High Volume, Low Cost Commercial Electronics", 10. Applied Power Electronics Conf, IEEE, 1994, pp. 805-809.
8. Owzar, K. Buschik, O. Ehrmann; M. Kasper; "RF-Investigation of the electrical parameters of the embedded chip structure", Proc. VLSI Packaging Workshop, Monterey USA, October 16-18, (1995).
9. T. Waris, R. Tuominen, J. Kivilahti, "Panel-sized Integrated Module Board Manufacturing", Proc. Polytronic Conference, Oct. 21-24. 2001, Potsdam, Germany.
10. R. Tuominen, P. Palm, "Development of industrial scale manufacturing line for Integrated Module Board technology", 6th VLSI Packaging Workshop of Japan, November 12-14., 2002, Kyoto.
11. H. Braunisch, S. Towle, R. Emery, C. Hu and G. Vandentop, "Electrical Performance of Bumpless Build-Up Layer Packaging", Proc. ECTC 2002, May 28-31. 2002, San Diego, USA.
12. A. Ostmann, A. Neumann, S. Weser, E. Jung, L. Böttcher and H. Reichl, "Realization of a Stackable Package Using Chip in Polymer Technology", Polytronic Conference, June 23-26. 2002, Zalaegerszeg, Hungary.
13. A. Ostmann, A. Neumann, J. Auersperg, C. Ghahremani, G. Sommer, R. Aschenbrenner and H. Reichl, "Integration of Passive and Active Components into Build-Up Layers", EPTC 2002.