A high-throughput FPGA architecture for parallel connected components analysis based on label reuse

FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology

Volumn , Issue , 2013, Pages 302-305

  Klaiber, Michael J ^a   Bailey, Donald G ^b   Ahmed, Silvia ^a   Baroud, Yousef ^a   Simon, Sven ^a  

^a UNIVERSITY OF STUTTGART   (Germany)

^b MASSEY UNIVERSITY   (New Zealand)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84894178568     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPT.2013.6718372     Document Type: Conference Paper

References (10)

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6. F. Zhao, H. zhang Lu, and Z. yong Zhang, "Real-Time single-pass connected components analysis algorithm," EURASIP J. Image and Video Processing, vol. 2013, p. 21, 2013.
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9. M. Klaiber, L. Rockstroh, Z. Wang, Y. Baroud, and S. Simon, "A memory-efficient parallel single pass architecture for connected component labeling of streamed images," in 2012 International Conference on Field-Programmable Technology. FPT, Dec. 2012, pp. 159-165.
10. R. Seidel and M. Sharir, "Top-down analysis of path compression," SIAM J. Comput., vol. 34, no. 3, pp. 515-525, Mar. 2005.