Fast field solvers for thermal and electrostatic analysis

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 1998, Pages 518-523

  Szekely, V ^a   Rencz, M ^a  

^a BUDAPEST UNIVERSITY OF TECHNOLOGY AND ECONOMICS   (Hungary)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTROSTATIC ANALYSIS; MULTI-LAYERED; NODE REDUCTION; SIMULATION EXAMPLE; SOLVER TOOLS;

MICROSYSTEMS; TOOLS;

COMPUTER SIMULATION;

EID: 84893798800     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.1998.655907     Document Type: Conference Paper

References (8)

1. V. Székely, M. Rencz: Fast field solver programs for thermal and electrostatic analysis of microsystem elements, ICCAD97 Int. Conf. on Computer-Aided Design, Nov. 9-13 1997, San Jose, Ca, USA, Proc. pp.684-689
2. V. Székely, A. Csendes, M. Rencz: S-THERMANAL: An efficient thermal simulation tool for microsystem elements and MCMs. SPIE96 Symposium on Micromachining and Microfabrication, 14-15 October 1996, Austin, Texas, USA, SPIE Proc. Vol. 2880, pp. 64-75.
3. A.G. Kokkas: Thermal analysis of multiple-layer structures, IEEE Trans. on El. Dev., V. ED-21, No. 11, pp. 674-681 (1974)
4. V. Székely, P. Baji, M. Rencz: Graphical computer methods in the design of integrated circuits, Periodica Polytechnica, V. 23, No. 3-4, pp. 331-338 (1979)
5. V. Székely, A. Poppe: Novel tools for thermal and electrical analysis of circuits, Electrosoft, V. 1. No. 4. pp. 234-252 (1990)
6. T. A. Johnson, R. W. Knepper, V. Marcello and W. Wang: Chip substrate resistance modeling technique for integrated circuit design, IEEE Trans. on Computer-Aided Design, Vol.CAD-3, No.2, pp. 126-134 (1984)
7. V. Dudek, V.O. Keck, G. Mayer, B. Höfflinger: Design considerations for high performance low-power Siliconon-insulator gate arrays, Custom Integrated Circuits Conference 1995, Santa Clara, CA, May 1995
8. I. Habermajer, Ö.Lendvay, Z.Lábadi and V.Rakovics: Double hetero structure InP/GaInAsP laser diode with double channel substrate, built-in reverse-biased pn junction and buried active layer, Hungarian Patent No. 206 565., 1988