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Volumn , Issue , 1998, Pages 22-27

Hardware resource allocation for hardware/software partitioning in the LYCOS system

Author keywords

[No Author keywords available]

Indexed keywords

DATA PATHS; HARDWARE RESOURCES; HARDWARE/SOFTWARE PARTITIONING; NOVEL HARDWARE; PROFILING INFORMATIONS;

EID: 84893782472     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.1998.655832     Document Type: Conference Paper
Times cited : (32)

References (12)
  • 1
    • 0024706222 scopus 로고
    • Algorithms for hardware allocation in data path synthesis
    • S. Devadas and A. R. Newton. Algorithms for Hardware Allocation in Data Path Synthesis. IEEE Transactions on CAD, 8(7):768-781, 1989.
    • (1989) IEEE Transactions on CAD , vol.8 , Issue.7 , pp. 768-781
    • Devadas, S.1    Newton, A.R.2
  • 2
  • 4
    • 0026995418 scopus 로고
    • Automatic module allocation in high level synthesis
    • P. Gutberlet, J. Muller, H. Kramer, and W. Rosenstiel. Automatic Module Allocation in High Level Synthesis. In EURODAC, pages 328-333, 1992.
    • (1992) EURODAC , pp. 328-333
    • Gutberlet, P.1    Muller, J.2    Kramer, H.3    Rosenstiel, W.4
  • 5
    • 0024133189 scopus 로고
    • Module selection for pipelined synthesis
    • R. Jain, A. Parker, and N. Park. Module Selection for Pipelined Synthesis. In 25th ACM/IEEE DAC, pages 542-547, 1988.
    • (1988) 25th ACM/IEEE DAC , pp. 542-547
    • Jain, R.1    Parker, A.2    Park, N.3
  • 10
    • 0028397048 scopus 로고
    • Optimizing resource utilization using transformations
    • March
    • Miodrag Potkonjak and Jan Rabaey. Optimizing Resource Utilization Using Transformations. IEEE Transactions on CAD of ICs and Systems, 13(3):277-292, March 1994.
    • (1994) IEEE Transactions on CAD of ICs and Systems , vol.13 , Issue.3 , pp. 277-292
    • Potkonjak, M.1    Rabaey, J.2
  • 11
    • 0024682923 scopus 로고
    • Force-Directed scheduling for behavioral synthesis of asics
    • June
    • P. G. Paulin and J. P. Knight. Force-Directed Scheduling for Behavioral Synthesis of ASICs. IEEE Transactions on Computer-Aided Design, 8(6):661-679, June 1989.
    • (1989) IEEE Transactions on Computer-Aided Design , vol.8 , Issue.6 , pp. 661-679
    • Paulin, P.G.1    Knight, J.P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.