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Volumn , Issue , 2003, Pages 828-833

Using formal techniques to debug the AMBA system-on-chip bus protocol

Author keywords

[No Author keywords available]

Indexed keywords

ADVANCED MICRO-CONTROLLER BUS ARCHITECTURE; FORMAL SPECIFICATION; FORMAL TECHNIQUES; FORMAL VERIFICATIONS; INFORMAL REASONING; INTELLECTUAL PROPERTY CORES; STATE SPACE EXPLORATION; SYSTEM ON CHIP DESIGN;

EID: 84893778914     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2003.1253709     Document Type: Conference Paper
Times cited : (65)

References (12)
  • 1
    • 33750954311 scopus 로고    scopus 로고
    • Efficient verification of the pci local bus using boolean satisfiability
    • thesis (IWLS
    • F. Aloul and K. Sakallah. Efficient verification of the PCI local bus using boolean satisfiability. In International Workshop on Logic Synthesis (IWLS), 2000
    • (2000) International Workshop on Logic Syn
    • Aloul, F.1    Sakallah, K.2
  • 2
    • 0022769976 scopus 로고
    • Graph-based algorithms for boolean function manipulation
    • R. Bryant. Graph-based algorithms for boolean function manipulation. IEEE Transactions on Computers, C-35(9), 1986
    • (1986) IEEE Transactions on Computers, C-35 , vol.9
    • Bryant, R.1
  • 3
    • 84893794359 scopus 로고    scopus 로고
    • Free download from California, USA. The SMV Model Checker
    • Cadence Berkeley Laboratories, Free download from http://www-cad.eecs. berkeley.edu/ kenmcmil/smv/, California, USA. The SMV Model Checker, 1999
    • (1999) Cadence Berkeley Laboratories
  • 5
    • 0022706656 scopus 로고
    • Automatic verification of finite-state concurrent systems using temporal logic specifications
    • E. Clarke, E. Emerson, and A. Sistla. Automatic verification of finite-state concurrent systems using temporal logic specifications. ACM Trans. Prog. Lang. Syst., 8(2), 1986
    • (1986) ACM Trans. Prog. Lang. Syst , vol.8 , pp. 2
    • Clarke, E.1    Emerson, E.2    Sistla, A.3
  • 9
    • 0036056701 scopus 로고    scopus 로고
    • High-level specification and automatic generation of IP interface monitors
    • M. Oliveira and A. Hu. High-level specification and automatic generation of IP interface monitors. In ACM/IEEE Design Automation Conference, 2002
    • (2002) ACM IEEE Design Automation Conference
    • Oliveira, M.1    Hu, A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.