Transaction-level models for AMBA bus architecture using SystemC 2.0

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2003, Pages 26-31

  Caldari, M ^a   Conti, M ^a   Coppola, M ^b   Curaba, S ^b   Pieralisi, L ^a   Turchetti, C ^a  

^a UNIVERSITÀ POLITECNICA DELLE MARCHE   (Italy)

^b STMICROELECTRONICS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ADDRESS GENERATORS; COMMUNICATION INFRASTRUCTURE; HARDWARE DESCRIPTIONS; MODEL ARCHITECTURE; ORDERS OF MAGNITUDE; TRANSACTION LEVEL MODELING; TRANSACTION LEVEL MODELS; TRANSACTION-LEVEL MODEL;

ARCHITECTURE; DESIGN; EXHIBITIONS;

COMPUTER SIMULATION;

EID: 84893751424     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2003.1186667     Document Type: Conference Paper

References (11)

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3. CoCentric System Studio Data Sheet, Synopsys http://www.synopsys.com, 2002
4. R. Domer, Daniel D. Gajski: Reuse and protection of Intellectual Property in the SpecC system, University of California, Irvine, http://www.ics.uci.edu
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7. A.Gerstlauer, S.Zhao, D.Gajski, A.Horak: SpecC Systemlevel design methodology applied to design of a GSM Vocoder University of California, Irvine and Motorola Semiconductor products sector, http://www.ics.uci.edu
8. T. Grotker, S. Liao, G. Martin, S. Swan: System design with SystemC Kluwer Academic Publishers, 2002
9. Preeti Ranjan Panda: SystemC-A modeling platform supporting multiple design abstractions, Synopsys Inc, http://www.synopsys.com
10. Open SystemC Iniative (OSCI), SystemC documentation: Http://www.systemc. org, 2001
11. Kjetil Svarstad, Gabriela Nicolescu, Ahmed A. Jerraya: A model for Describing Communication between Aggregate Objects in the Specification and Design of Embedded systems SINTEF Telecom and Informatics, TIMA Laboratory, SLS group, http://www.systemc.org