A methodology for rapid analysis and optimization of embedded systems

Proceedings - IEEE Symposium and Workshop on Engineering of Computer-Based Systems, ECBS 1996

Volumn , Issue , 1996, Pages 252-259

  Eikerling, H J ^a   Hardt, W ^b   Gerlach, J ^a   Rosenstiel, W ^a  

^a UNIVERSITY OF TÜBINGEN   (Germany)

^b UNIVERSITY OF PADERBORN   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SCIENCE; COMPUTERS; ENGINEERING; INDUSTRIAL ENGINEERING;

DESIGN FLOWS; MANUAL INTERVENTION; MODULAR IMPLEMENTATION; RAPID ANALYSIS; UNIX COMMAND;

EMBEDDED SYSTEMS;

EID: 84893729738     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECBS.1996.494536     Document Type: Conference Paper

References (22)

1. A.V. Aho, R. Sethi, and J.D. Ullman. Compilers: Principles, Techniques and Tools. AT&T Bell Telephone Laboratories Inc., 1986.
2. R. Camposano and R. Brayton. Partitioning before Logic Synthesis. In Proc. of the International Conference on Computer-Aided Design, pages 324326, Santa Clara, CA, November 1987. IEEE.
3. T.H. Corman, C.E. Leiserson, and R.L. Rivest. Introduction to Algorithms. MIT Press, Cambridge, London, 1990.
4. G. De Micheli. Synthesis and Optimization of Digital Circuits. McGraw-Hill, New York, 1994.
5. H.-J. Eikerling. Repartitionierung regularer, hierar-chischer Datenpfade. In 40th Intern. Wiss. Kollo-quium Ilmenau, pages 67-72, Ilmenau, September 18-21 1995.
6. H.-J. Eikerling, R. Hunstock, and R. Camposano. Optimization of Hierarchical Designs using Partitioning and Resynthesis. In Proc. of the International Conference on Computer-Aided Design, San Jose, CA, November 6-10 1994.
7. H.-J. Eikerling, M. Schmidt, and W. Rosenstiel. A Fully Symbolic Framework for Area-minimizing Hardware Resynthesis. In IFIP TCIO, WG 10.5 Workshop on Logic and Architecture Synthesis, pages 163-171, INPG, Grenoble, France, December 19-20 1995.
8. Ch. Ewering. Automatic High-Level Synthesis of Partitioned Busses. In Proc. of the International Conference on Computer-Aided Design, pages 304-307, Santa Clara, CA, November 1990. IEEE.
9. R. Genevriere. Flexible Synthesis of Hierarchy with PMOSS. In 40th Intern. Wiss. Kolloquium Ilmenau, pages 61-66, Ilmenau, September 18-21 1995.
10. R. K. Gupta and G. De Micheli. Constrained software generation for hardware/software systems. In Third International Workshop on Hardware /Software Codesign, pages 56-64, Grenoble, September 1994.
11. R.K. Gupta and G. De Micheli. Partitioning of Functional Models of Synchronous Digital Systems. In Proc. of the International Conference on Computer-Aided Design, pages 216-219, Santa Clara, CA, 1990. IEEE.
12. W. Hardt and R. Camposano. Specification Analysis for HW/SW Partitioning. Technical Report SFB-358-B2-5/94, University of Paderborn, Technical University of Dresden, 1994.
13. W. Hardt, A. Gunther, and R. Camposano. Pipelined Interface for HW/SW Codesign. Technical Report SFB-358-B2-3/94, University of Paderborn, Technical University of Dresden, 1994.
14. W. Hardt and W. Rosenstiel. Speed-Up Estimation for HW/SW-Systems. In CODES/CASHE, Pittsburgh, PA, March 1996. To appear.
15. A.Hoffmann, H.-J. Eikerling, W. Hardt, and R. Genevriere. PSF-Paderborn Synthesis Format. Technical Report SFB-358-B2-6/94, University of Paderborn, Technical University of Dresden, 1994.
16. W. Rosenstiel. Optimizations in High-Level Synthesis. Microprogramming and Microprocessing, 18:543-549, 1986.
17. Synopsys, Inc., Mountain View, CA. VHDL Design Analyzer (tm) Manual, 3.3a edition, 1995.
18. Vlissides, J.M. and Linton, M.A. Unidraw: A Framework for Building Domain-Specific Graphical Editors. In Proc. of the ACM SIGGRAPH/ SIGCHI User Interface Software and Technologies, 1989.
19. R.A. Walker and D.E. Thomas. Behavioral Transformation for Algorithmic Level IC Design. IEEE Transactions on Computer-Aided Design, 8(10): 1115-1127, October 1989.
20. M. Wendling and W. Rosenstiel. A Hardware Environment for Prototyping and Partitioning Based on Multiple FPGAs. In Proc. of the European Design Automation Conference, pages 77-82, Grenoble, France, September 1994. IEEE.
21. W. Wolf. Hardware-Software Codesign of Embedded Systems. Proceedings of the IEEE, 83(7):967-989, 1994.
22. Zycad Corporation, Inc., USA. Concept Silicon Software (tm) Manual, 6.0 edition, 1994.