Continuous representation of the performance of a CMOS library

European Solid-State Circuits Conference

Volumn , Issue , 2003, Pages 595-598

  Labouygues, B ^a   Schindler, J ^b   Engels, S ^b   Maurine, P ^c   Azemard N ^c   Auvergne, D ^c  

^a UNIV MONTPELLIER   (France)

^b STMICROELECTRONICS   (Italy)

^c CNRS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRICAL SIMULATION; PARAMETER CALIBRATION; PERFORMANCE SENSITIVITY; PROCESS MODELING; PROPAGATION DELAYS; SUPPLY VOLTAGES; TIMING PERFORMANCE; TRANSITION TIME;

EID: 84893727333     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2003.1257205     Document Type: Conference Paper

References (8)

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3. J. Meyer "Semiconductor Device Modeling for CAD" Ch. 5, Herskowitz and Schilling ed. mc Graw Hill, 1972.
4. C. Mead and L. Conway, "Introduction to VLSI systems", Reading MA: Addison Wesley 1980.
5. T. Sakurai and A. R. Newton, "Alpha-power model, and its application to CMOS inverter delay and other formulas", J. of Solid State Circuits vol. 25, pp. 584-594, April 1990
6. I. Sutherland, B. Sproull, D. Harris, "Logical Effort: Designing Fast CMOS Circuits", Morgan Kaufmann Publishers, INC., San Francisco, California, 1999.
7. S. M. Sze, Thysics of Semiconductor Devices', New York, Wiley, 1983.
8. ] J. A. Power et all, 'An Investigation of MOSFET Statistical and Temperature Effects', Proc. IEEE 1992 Int. Conference on Microelectronic Test Structures, Vol. 5, March 1992.