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Volumn , Issue , 2001, Pages 510-513

A fully integrated 2.4GHz LC-VCO frequency synthesizer with 3ps jitter in 0.18μ m standard digital CMOS copper technology

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK SIGNAL; COPPER TECHNOLOGY; FRACTIONAL DIVIDER; FULLY INTEGRATED; LONG-TERM JITTER; PLL BANDWIDTHS; SAMPLING CLOCKS; TRANSCEIVER CHIPS;

EID: 84893704791     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (4)

References (8)
  • 2
    • 84897540404 scopus 로고    scopus 로고
    • A fully integrated 1.3GHz VCO for GSM in 0.25μm standard CMOS with a phasenoise of-142dBc/Hz at 3MHz offset
    • Paris, france, 2-6 October
    • M. Tiebout, "A fully integrated 1.3GHz VCO for GSM in 0.25μm standard CMOS with a phasenoise of-142dBc/Hz at 3MHz offset", European Microwave Conference Paris, france, 2-6 October 2000
    • (2000) European Microwave Conference
    • Tiebout, M.1
  • 3
    • 0029516517 scopus 로고
    • A 1.8-GHz CMOS low-phase-noise voltage-controlled oscillator with prescaler
    • Dec.
    • J. Craninckx, M. Steyaert, "A 1.8-GHz CMOS Low-Phase-Noise Voltage-Controlled Oscillator with Prescaler", , IEEE JSSC vol. 30, Dec. 1995, pp. 1474-1482.
    • (1995) IEEE JSSC , vol.30 , pp. 1474-1482
    • Craninckx, J.1    Steyaert, M.2
  • 4
    • 0024611252 scopus 로고
    • High-Speed CMOS Circuit technique
    • Feb.
    • J. Yuan, C. Svensson, "High-Speed CMOS Circuit technique" , IEEE JSSSC vol. 24, no. 1, Feb. 1989
    • (1989) IEEE JSSSC , vol.24 , Issue.1
    • Yuan, J.1    Svensson, C.2
  • 5
    • 0005830365 scopus 로고    scopus 로고
    • A novel structure for DCO plls with equivalent 16bit digital phase quantization, digital loop filter and 18ps Long-term Jitter
    • C. Sandner, N. Da Dalt, "A Novel Structure for DCO PLLs with Equivalent 16bit Digital Phase Quantization, Digital Loop Filter and 18ps Long-term Jitter" Proceeding of the ESSCIRC, 2000 pp. 232-235.
    • (2000) Proceeding of the ESSCIRC , pp. 232-235
    • Sandner, C.1    Da Dalt, N.2
  • 8
    • 84893667499 scopus 로고    scopus 로고
    • A 2-V 900MHz monolithic CMOS dual-loop frequency synthesizer for GSM wireless receivers
    • W. Shing-Tak Yan, H. Cam Luong, "A 2-V 900MHz Monolithic CMOS Dual-Loop Frequency Synthesizer for GSM Wireless Receivers", 3URFHHGLQJV-RI-WKH-Proceeding of the ESSCIRC 2000 pp. 392-395
    • Proceeding of the ESSCIRC 2000 , pp. 392-395
    • Shing-Tak Yan, W.1    Cam Luong, H.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.