Performance study of CMOS power amplifiers

European Solid-State Circuits Conference

Volumn , Issue , 2001, Pages 425-428

  Mertens, K ^a   Reynaert, P ^a   Steyaert, M ^a  

^a UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CLASS E POWER AMPLIFIERS; CLASS-E AMPLIFIER; CMOS POWER AMPLIFIERS; DESIGN PROCESS; HIGHER EFFICIENCY; HIGHER FREQUENCIES; OUTPUT POWER; PERFORMANCE STUDY;

CMOS INTEGRATED CIRCUITS;

POWER AMPLIFIERS;

EID: 84893662633     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. [Mert.] K. Mertens, B. Nauwelaers and M. Steyaert, "A 700MHz, 1W fully differential Class E power amplifier in CMOS", ESSCIRC, September 2000, pp104-107.
2. [Tsai] K. C. Tsai and P. R. Gray, "A 1.9GHz 1W CMOS Class E Power Amplifier for Wireless Communications", IEEE journal of solid-state circuits, vol. 34, No. 7, July 1999, pp. 962-970.
3. C. Yoo and Q. Huang, "A Common-Gate switched, 0.9W Class E power amplifier with 41% PAE in 0.25m CMOS", VLSI Circuits Symposium, June 2000, pp.104 107.
4. D. Su and W. McFarland, "A 2.5V, 1W Monolithic CMOS RF Power Amplifier", IEEE Custom Integrated Circuits Conference", May 1997, pp.189-192.
5. Chen Wen, H. Floberg and Qiu Shui-Sheng, "A new analytical method for analysis and design of Class E power amplifiers taking into account the switching device on resistance", International Journal of Circuit Theory and Applications, Vol.27, 1999, pp.421-436.
6. P. Alinikula, K. Choi and S. I. Long, "Design of Class E power amplifier with non-linear parasitic output capacitance", IEEE transactions on circuits and systems II: Analog and digital signal processing, Vol. 46, No. 2, February 1999, pp. 114-119.