A 80MHz band-pass ΔΣ-modulator for a 100MHz IF-receiver

European Solid-State Circuits Conference

Volumn , Issue , 2001, Pages 530-533

  Salo, T ^a   Lindfors, S ^b   Halonen, K ^a  

^a AALTO UNIVERSITY   (Finland)

^b ROYAL INSTITUTE OF TECHNOLOGY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

CENTER FREQUENCY; CMOS TECHNOLOGY; DIGITAL INTERMEDIATE FREQUENCY; DOWNCONVERSION; FULLY DIFFERENTIAL; INTERMEDIATE FREQUENCIES; LOW SUPPLY VOLTAGES; SAMPLING FREQUENCIES;

ANALOG TO DIGITAL CONVERSION; CMOS INTEGRATED CIRCUITS; DIGITAL TO ANALOG CONVERSION;

MODULATORS;

EID: 84893649398     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. A. Hairapetian, "An 81-MHz IF Receiver in CMOS", IEEE J. of SSC, Vol. 31, No. 12, pp. 1981-1986, December 1996.
2. F. Singor, W. M. Snelgrove, "Switched-Capacitor Bandpass Delta-Sigma A/D Modulation at 10.7 MHz", IEEE J. of SSC, Vol. 30, No. 3, pp. 184-192, March 1995.
3. T. Salo, S. Lindfors, K. Halonen, "A Low-voltage Single-Opamp 4th-order Band-Pass-modulator", accepted to the 2001 IEEE ISCAS, May 2001, Sydney, Australia.
4. S. Liu, C. Kuo, R. Tsai, J.Wu, "A Double-Sampling Pseudo-Two-Path Bandpass-Modulator", IEEE J. of SSC, Vol. 35, No. 2, pp. 276-280, February 2000.
5. S. Lindfors, M. Länsirinne, K. Halonen, "2.7V 50MHz IF sampling-modulator with +37dBV IIP3," IEE Elect. Lett., vol. 37, no. 3, pp.150-151, February 2001.