Bandwidth enhancement techniques for transimpedance amplifier in cmos technologies

European Solid-State Circuits Conference

Volumn , Issue , 2001, Pages 174-177

  Lu, Chao Hsin ^a   Chen, Wei Zen ^a  

^a NATIONAL CENTRAL UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH ENHANCEMENT; BANDWIDTH EXTENSION; CMOS TECHNOLOGY; CORE CIRCUIT; DIGITAL CMOS; INDUCTIVE PEAKING; TRANS-IMPEDANCE GAIN; TRANSIMPEDANCE AMPLIFIERS;

CMOS INTEGRATED CIRCUITS;

DIFFERENTIAL AMPLIFIERS;

EID: 84893640631     PISSN: 19308833     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (6)

1. T. Masuda et al., "45GHz Transimpedance 32dB Limiting Amplifier and 40Gbps 1:4 High-Sensitivity Demultiplexer with Decision Circuit using SiGe HBTs for 40Gbps Optical Receiver", IEEE ISSCC, Dig. Tech. Papers, pp. 60-61, 2000.
2. F.T. Chien and Y.J. Chan, "Bandwidth Enhancement of Transimpedance Amplifier by a Capacitive-Peaking Design", IEEE J. Solid-State Circuits, vol. 34, pp. 1167-1170, Aug. 1999.
3. S.S. Mohan, M. Hershenson, S.P. Boyd, and T.H. Lee, "Bandwidth Extension in CMOS with Optimized On-Chip Inductors", IEEE J. Solid-State Circuits, vol.35, pp. 346-355, Mar. 2000.
4. J.J. Morikuni and S.M. Kang, "An Analysis of Inductive Peaking in Photoreceiver Design", IEEE J. Solid-State Circuits, vol. 10, pp. 1426-1437, Oct. 1992.
5. E. Sackinger and W.C. Fischer, "A 3GHz, 32dB CMOS Limiting Amplifier for SONET OC-48 Receivers", IEEE ISSCC, Dig. Tech. Papers, pp. 158-159, 2000.
6. S.B. Baker and C. Thoumazou, "Low Noise CMOS Common Gate Optical Preamplifier Using Active Feedback", Electron. Lett., vol.34, pp. 2235-2237, Nov. 1998.