VERIFUL : VERIfication using functional learning

Proceedings of the 1995 European Conference on Design and Test, EDTC 1995

Volumn , Issue , 1995, Pages 444-448

  Mukherjee, Rajarshi ^a   Jain, Jawahar ^b   Fujita, Masahiro ^b  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

^b FUJITSU LABORATORIES OF AMERICA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT DESIGNS; FUNCTIONAL MANIPULATION; GENERAL LEARNING; INDIRECT IMPLICATION;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 84893630371     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/edtc.1995.470358     Document Type: Conference Paper

References (19)

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