Integrity verification for path Oblivious-RAM

2013 IEEE High Performance Extreme Computing Conference, HPEC 2013

Volumn , Issue , 2013, Pages

  Ren, Ling ^a   Fletcher, Christopher W ^a   Yu, Xiangyao ^a   Van Dijk, Marten ^a   Devadas, Srinivas ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER PROGRAMMING; COMPUTER SCIENCE;

ACTIVE ADVERSARY; INTEGRITY VERIFICATIONS; ITS EFFICIENCIES; MEMORY ACCESS PATTERNS;

RANDOM ACCESS STORAGE;

EID: 84893446005     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPEC.2013.6670339     Document Type: Conference Paper

References (28)

1. M. Islam, M. Kuzu, and M. Kantarcioglu, "Access pattern disclosure on searchable encryption: Ramification, attack and mitigation," in Network and Distributed System Security Symposium (NDSS), 2012.
2. X. Zhuang, T. Zhang, and S. Pande, "HIDE: an infrastructure for efficiently protecting information leakage on the address bus," in Proceedings of the 11th ASPLOS, 2004.
3. O. Goldreich and R. Ostrovsky, "Software protection and simulation on oblivious rams," in J. ACM, 1996.
4. R. Ostrovsky and V. Shoup, "Private information storage (extended abstract)," in STOC, 1997, pp. 294-303.
5. R. Ostrovsky, "Efficient computation on oblivious rams," in STOC, 1990.
6. I. Damg?ard, S. Meldgaard, and J. B. Nielsen, "Perfectly secure oblivious RAM without random oracles," in TCC, 2011.
7. D. Boneh, D. Mazieres, and R. A. Popa, "Remote oblivious storage: Making oblivious RAM practical," Manuscript, http://dspace. mit. edu/bitstream/handle/1721. 1/62006/MIT-CSAILTR-2011-018. pdf, 2011.
8. M. T. Goodrich, M. Mitzenmacher, O. Ohrimenko, and R. Tamassia, "Privacy-preserving group data access via stateless oblivious RAM simulation," in SODA, 2012.
9. E. Kushilevitz, S. Lu, and R. Ostrovsky, "On the (in)security of hashbased oblivious RAM and a new balancing scheme," in SODA, 2012.
10. P. Williams and R. Sion, "Round-optimal access privacy on outsourced storage," in CCS, 2012.
11. M. T. Goodrich, M. Mitzenmacher, O. Ohrimenko, and R. Tamassia, "Practical oblivious storage," in CODASPY, 2012.
12. E. Shi, T.-H. H. Chan, E. Stefanov, and M. Li, "Oblivious ram with o((log n)3) worst-case cost," in Asiacrypt, 2011, pp. 197-214.
13. E. Stefanov, E. Shi, and D. Song, "Towards practical oblivious RAM," in NDSS, 2012.
14. E. Stefanov and E. Shi, "Path O-RAM: An Extremely Simple Oblivious RAM Protocol," Cornell University Library, arXiv:1202. 5150v1, 2012, arxiv. org/abs/1202. 5150.
15. E. Stefanov, M. van Dijk, E. Shi, C. Fletcher, L. Ren, X. Yu, and S. Devadas, "Path O-RAM: An Extremely Simple Oblivious RAM Protocol," Cornell University Library, arXiv:1202. 5150v2, 2013, arxiv. org/abs/1202. 5150, to appear in CCS 2013.
16. D. Grawrock, The Intel Safer Computing Initiative: Building Blocks for Trusted Computing. Intel Press, 2006.
17. D. Lie, J. Mitchell, C. Thekkath, and M. Horowitz, "Specifying and verifying hardware for tamper-resistant software," in Proceedings of the IEEE Symposium on Security and Privacy, 2003.
18. D. Lie, C. Thekkath, and M. Horowitz, "Implementing an untrusted operating system on trusted hardware," in Proceedings of the Nineteenth ACM Symposium on Operating Systems Principles, 2003, pp. 178-192.
19. D. Lie, C. Thekkath, M. Mitchell, P. Lincoln, D. Boneh, J. Mitchell, and M. Horowitz, "Architectural Support for Copy and Tamper Resistant Software," in Proceedings of the 9th Int'l Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOSIX), November 2000, pp. 168-177.
20. G. E. Suh, D. Clarke, B. Gassend, M. van Dijk, and S. Devadas, " AEGIS: Architecture for Tamper-Evident and Tamper-Resistant Processing," in Proceedings of the 17th ICS (MIT-CSAIL-CSGMemo-474 is an updated version). New-York: ACM, June 2003 [Online]. Available: http://csg. csail. mit. edu/pubs/memos/Memo-474/Memo-474. pdf (revised one)
21. G. E. Suh, C. W. O'Donnell, I. Sachdev, and S. Devadas, "Design and Implementation of the AEGIS Single-Chip Secure Processor Using Physical Random Functions," in Proceedings of the 32nd ISCA'05. New-York: ACM, June 2005 [Online]. Available: http://csg. csail. mit. edu/pubs/memos/Memo-483/Memo-483. pdf
22. C. Fletcher, M. van Dijk, and S. Devadas, "Secure Processor Architecture for Encrypted Computation on Untrusted Programs," in Proceedings of the 7th ACM CCS Workshop on Scalable Trusted Computing, Oct. 2012, pp. 3-8.
23. C. W. Fletcher, "Ascend: An architecture for performing secure computation on encrypted data," in MIT CSAIL CSG Technical Memo 508 (Master's thesis), April 2013 [Online]. Available: http://csg. csail. mit. edu/pubs/memos/Memo-508/Memo-508. pdf
24. R. C. Merkle, "Protocols for public key cryptography," in IEEE Symposium on Security and Privacy, 1980, pp. 122-134.
25. J. R. Lorch, J. W. Mickens, B. Parno, M. Raykova, and J. Schiffman, "Toward practical private access to data centers via parallel oram. " IACR Cryptology ePrint Archive, vol. 2012, p. 133, 2012, informal publication [Online]. Available: http://dblp. unitrier. de/db/journals/iacr/iacr2012. html#LorchMPRS12
26. L. Ren, X. Yu, C. Fletcher, M. van Dijk, and S. Devadas, "Design space exploration and optimization of path oblivious ram in secure processors," in Proceedings of the Int'l Symposium on Computer Architecture, June 2013, available at Cryptology ePrint Archive, Report 2012/76.
27. P. Rosenfeld, E. Cooper-Balis, and B. Jacob, "Dramsim2: A cycle accurate memory system simulator," Computer Architecture Letters, vol. 10, no. 1, pp. 16-19, jan.-june 2011.
28. B. Gassend, G. E. Suh, D. Clarke, M. van Dijk, and S. Devadas, "Caches and Merkle Trees for Efficient Memory Integrity Verification," in Proceedings of Ninth International Symposium on High Performance Computer Architecture. New-York: IEEE, February 2003.