The role of pre-anneal conditions on the microstructure of Ge+ implanted Si after high temperature milli-second flash annealing

Proceedings of the International Conference on Ion Implantation Technology

Volumn 22-27-September-2002, Issue , 2002, Pages 76-78

  Jones, K S ^a   Crane, S P ^a   Ross, C E ^a   Malmborg, T ^a   Downey, D ^b   Arevalo, E ^b   McCoy, S ^c   Gelpey, J ^c  

^a University of Florida   (United States)

^b VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES   (United States)

^c Vortek Industries Ltd   (Canada)

Author keywords

flash annealing; milli second; varying impulse temperature; varying preanneal conditionas; varying ramp rate

Indexed keywords

ANNEALING; DEFECT DENSITY; DEFECTS; GERMANIUM; HIGH RESOLUTION TRANSMISSION ELECTRON MICROSCOPY; ION IMPLANTATION; MICROSTRUCTURE; SHEET RESISTANCE; SILICON; TEMPERATURE; TRANSMISSION ELECTRON MICROSCOPY;

AFTER HIGH TEMPERATURE; DEFECT MICROSTRUCTURE; FINAL MICROSTRUCTURES; FLASH ANNEALING; MICRO-STRUCTURAL PROPERTIES; MILLI-SECOND; RAMP RATES; VARYING PREANNEAL CONDITIONAS;

SILICON WAFERS;

EID: 84892346000     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IIT.2002.1257942     Document Type: Conference Paper

References (5)

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3. J. Ross et al., 9th Int. Conf. on Advanced Thermal Processing of Semiconductors - RTP 2001, in press, (2001)
4. J. Gelpey et al., 201st Electrochemical Society Meeting, in press, (2002)
5. K.S. Jones, S. Prussin and E.R. Weber, Appl. Phys. A., 45, 1, 1988.