Hardware design of a high-precision and fault-tolerant clock subsvstem for CAN networks

IFAC Proceedings Volumes (IFAC-PapersOnline)

Volumn 36, Issue 13, 2003, Pages 39-46

  Rodríguez Navas, Guillermo ^a   Bosch, José Juan ^a   Proenza, Julian ^a  

^a UNIVERSITAT DE LES ILLES BALEARS   (Spain)

Author keywords

Clock synchronization; Controller area network; Distributed control; Embedded systems; Fault tolerance; Fieldbus; Real time systems

Indexed keywords

CLOSED LOOP CONTROL SYSTEMS; CONTROL SYSTEM SYNTHESIS; CONTROLLERS; DISTRIBUTED PARAMETER CONTROL SYSTEMS; EMBEDDED SYSTEMS; FAULT TOLERANCE; FAULT TOLERANT COMPUTER SYSTEMS; INFORMATION SERVICES; INTERACTIVE COMPUTER SYSTEMS; MECHANICAL CLOCKS; NETWORK ARCHITECTURE; NETWORK PROTOCOLS; PROCESS CONTROL; SYNCHRONIZATION;

CLOCK SYNCHRONIZATION; CONTROLLER AREA NETWORK; CONTROLLER AREA NETWORK PROTOCOLS; DISTRIBUTED CONTROL; FIELDBUS; HARDWARE DESIGN; HIGH-PRECISION; REAL TIME DISTRIBUTED SYSTEMS;

REAL TIME SYSTEMS;

EID: 84890787326     PISSN: 14746670     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1016/S1474-6670(17)32462-X     Document Type: Conference Paper

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