-
2
-
-
0024648169
-
Schemas and neural network for sixth generation computing
-
Arbib, M. A. “Schemas and neural network for sixth generation computing.” Journal of Parallel and Distributed Computing. Vol. 6(2): pp. 185-216, 1989.
-
(1989)
Journal of Parallel and Distributed Computing
, vol.6
, Issue.2
, pp. 185-216
-
-
Arbib, M.A.1
-
3
-
-
85029577654
-
Design and implementation of the REMAP3 software reconfigurable SIMD parallel computer
-
Linköping, Sweden
-
Bengtsson, L., A. Linde, T. Nordström, B. Svensson, M. Taveniku and A. Åhlander. “Design and implementation of the REMAP3 software reconfigurable SIMD parallel computer.” In Fourth Swedish Workshop on Computer Systems Architecture, Linköping, Sweden, 1992.
-
(1992)
Fourth Swedish Workshop on Computer Systems Architecture
-
-
Bengtsson, L.1
Linde, A.2
Nordström, T.3
Svensson, B.4
Taveniku, M.5
Åhlander, A.6
-
5
-
-
0009686565
-
LUCAS Associative Array Processor — Design, P
-
Vol 216 of Lecture Notes in Computer Science. Springer Verlag. Berlin
-
Fernström, C., I. Kruzela and B. Svensson. LUCAS Associative Array Processor — Design, Programming and Application Studies. Vol 216 of Lecture Notes in Computer Science. Springer Verlag. Berlin. 1986.
-
(1986)
Rogramming and Application Studies
-
-
Fernström, C.1
Kruzela, I.2
Svensson, B.3
-
7
-
-
0023855839
-
An introduction to neural computing
-
Kohonen, T. “An introduction to neural computing.” Neural Networks. Vol. 1: pp. 3-16, 1988.
-
(1988)
Neural Networks
, vol.1
, pp. 3-16
-
-
Kohonen, T.1
-
12
-
-
0026827812
-
Using and designing massively parallel computers for artificial neural networks
-
Nordström, T. and B. Syensson. “Using and designing massively parallel computers for artificial neural networks.” Journal of Parallel and Distributed Computing. Vol. 14(3): pp. 260-285, 1992.
-
(1992)
Journal of Parallel and Distributed Computing
, vol.14
, Issue.3
, pp. 260-285
-
-
Nordström, T.1
Syensson, B.2
-
13
-
-
84889535130
-
Highly parallel hardware implementation of sparse distributed memory
-
Helsinki, Finland
-
Saarinen, J., M. Lindell, P. Kotilainen, J. Tomberg, P. Kanerva and K. Kaski. “Highly parallel hardware implementation of sparse distributed memory.” In International Conference on Artificial Neural Networks, Vol. 1, pp. 673-678, Helsinki, Finland, 1991.
-
(1991)
International Conference on Artificial Neural Networks
, vol.1
, pp. 673-678
-
-
Saarinen, J.1
Lindell, M.2
Kotilainen, P.3
Tomberg, J.4
Kanerva, P.5
Kaski, K.6
-
15
-
-
2342487741
-
A hardware emulator for binary neural networks
-
Paris
-
Skubiszewski, M. “A hardware emulator for binary neural networks.” In International Neural Network Conference, Vol. 2, pp. 555-558, Paris, 1990.
-
(1990)
International Neural Network Conference
, vol.2
, pp. 555-558
-
-
Skubiszewski, M.1
-
16
-
-
0025565072
-
Execution of neural network algorithms on an array of bit-serial processors
-
Atlantic City, New Jersey, USA
-
Svensson, B. and T. Nordström. “Execution of neural network algorithms on an array of bit-serial processors.” In 10th International Conference on Pattern Recognition, Computer Architectures for Vision and Pattern Recognition, Vol. 2, pp. 501-505, Atlantic City, New Jersey, USA, 1990.
-
(1990)
10Th International Conference on Pattern Recognition, Computer Architectures for Vision and Pattern Recognition
, vol.2
, pp. 501-505
-
-
Svensson, B.1
Nordström, T.2
-
17
-
-
85029592617
-
-
Thinking Machines Corporation, (Version 6.0), T M C Cambridge, Massachusetts
-
Thinking Machines Corporation. “C* User's guide and C* Programming Guide.” (Version 6.0), T M C Cambridge, Massachusetts, 1990.
-
(1990)
C* User's Guide and C* Programming Guide
-
-
-
18
-
-
85029590682
-
-
(Masters Thesis 1991:117 E), Luleå University of Technology, In Swedish
-
Unnebäck, M. “Gate array implementations of processing elements for a reconfigurable, modular, massively parallel SIMD computer.” (Masters Thesis 1991:117 E), Luleå University of Technology, 1991. [In Swedish]
-
(1991)
Gate Array Implementations of Processing Elements for a Reconfigurable, Modular, Massively Parallel SIMD Computer
-
-
Unnebäck, M.1
-
19
-
-
0001963326
-
AnyBoard: An FPGA-based, reconfigurable system
-
Van den Bout, D. E., J. N. Morris, D. Thomae, S. Labrozzi, S. Wingo and D. Hallman. “AnyBoard: An FPGA-based, reconfigurable system.” IEEE Design & Test of Computers. (September): pp. 21-30, 1992.
-
(1992)
IEEE Design & Test of Computers. (September)
, pp. 21-30
-
-
Van Den Bout, D.E.1
Morris, J.N.2
Thomae, D.3
Labrozzi, S.4
Wingo, S.5
Hallman, D.6
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