High level modeling and validation methodologies for embedded systems: Bridging the productivity gap

Proceedings of the IEEE International Conference on VLSI Design

Volumn 2003-January, Issue , 2003, Pages 9-14

  Shukla, S K ^a   Edwards, S A ^b   Talpin, J P ^c   Gupta, R K ^d  

^a VIRGINIA POLYTECHNIC INSTITUTE AND STATE UNIVERSITY   (United States)

^b Columbia University ^*  (United States)

^c CAMPUS DE BEAULIEU   (France)

^d UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Computational modeling; Computer networks; Design engineering; Embedded computing; Embedded system; Handheld computers; Hardware design languages; Pervasive computing; Productivity; System level design

Indexed keywords

COMPUTATION THEORY; COMPUTATIONAL LINGUISTICS; COMPUTER HARDWARE; COMPUTER NETWORKS; DESIGN; EMBEDDED SOFTWARE; HAND HELD COMPUTERS; HARDWARE; HARDWARE-SOFTWARE CODESIGN; INTEROPERABILITY; MODELING LANGUAGES; PRODUCTIVITY; SYSTEMS ANALYSIS; UBIQUITOUS COMPUTING;

COMPUTATIONAL MODEL; DESIGN ENGINEERING; EMBEDDED COMPUTING; HARDWARE DESIGN LANGUAGE; SYSTEM LEVEL DESIGN;

EMBEDDED SYSTEMS;

EID: 84889974869     PISSN: 10639667     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICVD.2003.1183104     Document Type: Conference Paper

References (4)

1. Sandeep K. Shukla's webpage: http://filebox.vt.edu/users/shukla
2. Stephen A. Edward's webpage: http://www.cs.columbia.edu/~sedwards
3. Jean-Pierre Talpin's webpage : http://www.irisa.fr/prive/talpin
4. Rajesh K. Gupta's webpage: http://www.ics.uci.edu/~rgupta