A Signature Analysis Method for IC Failure Analysis

Conference Proceedings from the International Symposium for Testing and Failure Analysis

Volumn 1996-November, Issue , 1996, Pages 189-195

  Henderson, C L ^a   Soden, J M ^a  

^a SANDIA NATIONAL LABORATORIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FAILURE (MECHANICAL); FORMAL LOGIC; INTEGRATED CIRCUITS; TIMING CIRCUITS;

ANALYSIS METHOD; DEMPSTER-SHAFER THEORY; EXPERIENTIAL KNOWLEDGE; FAILURE MECHANISM; OBSERVED DATA; SIGNATURE ANALYSIS;

FAILURE ANALYSIS;

EID: 84889509983     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.31399/asm.cp.istfa1996p0189     Document Type: Conference Paper

References (9)

1. M. Pore, G. Gilfeather, and L. Levy, "Risk Assessment in Signature Analysis," to be presented at Int. Symp. Test, and Fail. Anal, Nov 18-22 1996.
2. G. F. Luger and W. A. Stubblefield, Artificial Intelligence and the Design of Expert Systems, Benjamin Cummings Publishing Co. Inc., 1989, p. 314
3. Rich and Knight, Artificial Intelligence, McGrawHill Inc., 1991, pp. 242-246.
4. Encyclopedia of A.I., ed. Shapiro, Wiley and Sons Inc., 1992, pp. 330-331.
5. F. W. Spencer, personal communication, July 25, 1996.
6. C. L. Henderson and R. D. Barnard, "The Advent of Failure Analysis Software Technology," Proc. Int. Reliab. Phys. Symp., 1994, pp. 325-333.
7. R. Aitken, "A Comparison of Defect Models for Fault Location with IDDQ Measurements," Proc. Int. Test. Conf., 1992, pp. 778-787.
8. C. F. Hawkins, J. M. Soden, A. W. Righter, and J. Ferguson, "Defect Classes - An Overdue Paradigm for CMOS IC Testing," Proc. Int. Test Conf., 1994, pp. 413-495.
9. R. Aitken, "Finding Defects with Fault Models," Proc. Int. Test Conf., 1995, pp. 498-505.