|
Volumn 1, Issue , 2000, Pages 244-251
|
FPGA implementation of wavelet packet transform with reconfigurable tree structure
|
Author keywords
[No Author keywords available]
|
Indexed keywords
FPGA IMPLEMENTATIONS;
FUNCTIONAL SIMULATIONS;
PIPELINED ARCHITECTURE;
TEMPORAL RESOLUTION;
TIME-FREQUENCY PLANES;
TIME-FREQUENCY TILINGS;
WAVELET PACKET TRANSFORM(WPT);
WAVELET PACKET TRANSFORMS;
IMAGE PROCESSING;
TREES (MATHEMATICS);
RECONFIGURABLE HARDWARE;
|
EID: 84889242466
PISSN: 10896503
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/EURMIC.2000.874639 Document Type: Conference Paper |
Times cited : (13)
|
References (8)
|