A 12.5 Gb/s Si bipolar IC for PRBS generation and bit error detection up to 25 Gb/s

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 1993, Pages 152-153

  Bussmann, M ^a   Langmann, U ^a   Hillery, B ^b   Brown, W W ^b  

^a RUHR UNIVERSITY BOCHUM   (Germany)

^b HEWLETT PACKARD COMPANY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BINARY SEQUENCES; EQUIPMENT TESTING; ERROR DETECTION; OPTICAL FIBER COMMUNICATION; OPTICAL FIBERS; SILICON; TIMING CIRCUITS;

HIGH SPEED OPTICAL FIBER COMMUNICATION SYSTEM; MONOLITHIC SOLUTIONS; PSEUDO-RANDOM BINARY SEQUENCES; SEQUENCE LENGTHS; SWITCHABLE; TEST EQUIPMENTS; TEST PROBLEM; TWO CHANNEL;

BIPOLAR INTEGRATED CIRCUITS;

EID: 84889230468     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.1993.280033     Document Type: Conference Paper

References (5)

1. OReilly, J. J., "Series-parallel generation of m-sequences", The Radio and Electronic Engineer, vol. 45, no. 4, pp. 171-176, Apr. 1975.
2. Bussmann, M., U. Langmann, "Proposal for a versatile monolithic multi-Gbitls m-sequence test system", Electronics Let., vol. 26, no. 19, pp. 1625-1626, Sept. 1990.
3. Huang, W. M., et al., "A high-speed bipolar technology featuring self-Aligned single-poly base and submicrometer emitter contacts", IEEE ElectronDeviceLet.,vol. EDL-11,no . 9, pp. 412-414, Sept. 1990.
4. Rein, H-M., et al., "30 Gbitls multiplexer and demultiplexer ICs in silicon bipolar technology," Electronics Let., vol. 28, no. 1, pp. 97-99, Jan. 1992.
5. Felder, A., et al., "Static silicon frequency divider for low power consumption (4mW, 10GHz) and high speed (160mW, 19GHz)", IEEE Bipolar Circuits and Technology Meeting, Proc., pp. 159-162, 1992.