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Volumn 2280 LNCS, Issue , 2002, Pages 327-341

A temporal logic based theory of test coverage and generation

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER CIRCUITS; MODEL CHECKING;

EID: 84888265186     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-46002-0_23     Document Type: Conference Paper
Times cited : (107)

References (24)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.