Semi-empirical modelling of SiO2 chemical-mechanical polishing planarization

1991 Proceedings 8th International IEEE VLSI Multilevel Interconnection Conference, VMIC 1991

Volumn , Issue , 1991, Pages 379-384

  Burke, Peter A ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT INTERCONNECTS; POLISHING; SILICA; VLSI CIRCUITS;

CHEMICAL MECHANICAL POLISHING(CMP); CLOSED SOLUTIONS; COMPLEX ANALYSIS; CORNER ROUNDING; DIFFERENTIAL MODELS; POLISHING PADS; PROCESS CHARACTERIZATION; SIMPLE ANALYSIS;

CHEMICAL MECHANICAL POLISHING;

EID: 84888254408     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VMIC.1991.153031     Document Type: Conference Paper

References (7)

1. B. Davari et al., IEDM Tech. Digest, 1989, p. 61, 1989.
2. T. Daubenspeck et al, J. Electrochem. Soc. 138, 507, 1991.
3. M. Thomas et al, VMIC 1990 Proc, p. 438, 1990.
4. P. Renteln et al., VMIC 1990 Proc, p. 57, 1990.
5. R. Uttecht et al., VMIC 1991 Proc, 1991, in submission.
6. W. Cote and M. Leach, US patent 4, 910, 155.
7. Rodel Products Corporation, Newark, DE