Evaluation of early failure screening methods [ASICs]

Digest of Papers - 1996 IEEE International Workshop on IDDQ Testing, IDDQ 1996

Volumn , Issue , 1996, Pages 14-17

  Barrette, T ^a   Bhide, V ^a   De, K ^a   Stover, M ^a   Sugasawara, E ^a  

^a AGERE SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC TESTING; AUTOMOBILE MANUFACTURE; COST EFFECTIVENESS; DEFECTS; EQUIPMENT TESTING; FAILURE ANALYSIS; GATES (TRANSISTOR);

AUTOMATIC TEST EQUIPMENT; GATE-OXIDE DEFECTS; HIGH-VOLTAGE STRESS; SCREENING METHODS; SCREENING TECHNIQUES; STRESS DURATION; STRESS VOLTAGES; VOLTAGE ACCELERATION;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 84886910586     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IDDQ.1996.557801     Document Type: Conference Paper

References (2)

1. J. W. McPherson and D.A.Baglee, "Acceleration factors for thin gate oxide stressing", Proc. IRPS 1985, Orlando, Flori'da.
2. R. Moazzami and chenming Hu, "Si02 TDDB Testing and Burn-In", Tutorial Notes, IRPS 1992, San Diego Ca.