Gate electrode microstructure having stacked large-grain poly-Si with ultra-thin SiOx interlayer for reliability in sub-micrometer CMOS

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 1997, Pages 635-638

  Ito, H ^a   Sasaki, M ^a   Kimizuka, N ^a   Uwasawa, K ^a   Nakamura, N ^a   Ito, T ^a   Goto, Y ^a   Tsuboi, A ^a   Watanuki, S ^a   Ueda, T ^a   Horiuchi, T ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

VOLTAGE SHIFT;

CRYSTAL MICROSTRUCTURE; ELECTRODES; FITS AND TOLERANCES; GATES (TRANSISTOR); POLYCRYSTALLINE MATERIALS; SEMICONDUCTING FILMS; SEMICONDUCTING SILICON; SEMICONDUCTING SILICON COMPOUNDS; SILICA; ULTRATHIN FILMS;

CMOS INTEGRATED CIRCUITS;

EID: 84886448158     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)