High performance 1.8 V, 0.20 μm CMOS technology with copper metallization

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 1997, Pages 769-772

  Venkatesan, S ^a   Gelatos, A V ^a   Misra, V ^a   Smith, B ^a   Islam, R ^a   Cope, J ^a   Wilson, B ^a   Tuttle, D ^a   Cardwell, R ^a   Anderson, S ^a   Angyal, M ^a   Bajaj, R ^a   Capasso, C ^a   Crabtree, P ^a   Das, S ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

PLANARIZED COPPER INTERCONNECTS;

COPPER; ELECTRIC RESISTANCE; METALLIZING; OPTIMIZATION; RANDOM ACCESS STORAGE; REACTIVE ION ETCHING; RELIABILITY; SCANNING ELECTRON MICROSCOPY; SEMICONDUCTOR DEVICE MANUFACTURE; TRANSISTORS;

CMOS INTEGRATED CIRCUITS;

EID: 84886448141     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)