Scalability of partially depleted SOI technology for sub-0.25 μm logic applications

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 1997, Pages 591-594

  Chau, Robert ^a   Arghavani, Reza ^a   Alavi, Moshen ^a   Douglas, Dave ^a   Greason, Jeff ^a   Green, Richard ^a   Tyagi, Sunit ^a   Xu, Jason ^a   Packan, Paul ^a   Yu, Scott ^a   Liang, Chunlin ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

STATIC RANDOM ACCESS MEMORY (SRAM);

LEAKAGE CURRENTS; LOGIC DEVICES; OSCILLATORS (ELECTRONIC); RANDOM ACCESS STORAGE; SEMICONDUCTOR DEVICE TESTING; TRANSISTORS;

SILICON ON INSULATOR TECHNOLOGY;

EID: 84886448111     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)