Low temperature metal-based cell integration technology for gigabit and embedded DRAMs

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 1997, Pages 41-44

  Yoshida, Makoto ^a   Kumauchi, Takahiro ^a   Kawakita, Keizo ^a   Ohashi, Naofumi ^a   Enomoto, Hiroyuki ^a   Umezawa, Tadashi ^a   Yamamoto, Naoki ^a   Asano, Isamu ^a   Tadaki, Yoshitaka ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC RANDOM ACCESS MEMORY (DRAM); METAL BASED CELL INTEGRATION TECHNOLOGY;

CLEANING; ENERGY GAP; LOW TEMPERATURE OPERATIONS; MOSFET DEVICES; OHMIC CONTACTS; THERMOANALYSIS;

RANDOM ACCESS STORAGE;

EID: 84886448095     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)