Novel self-aligned gate-overlapped LDD poly-Si TFT with high reliability and performance

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 1997, Pages 523-526

  Hatano, Mutsuko ^a   Akimoto, Hajime ^a   Sakai, Takeshi ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DRAIN AVALANCHE HOT CARRIERS; LIGHTLY DOPED DRAIN (LDD); POLYSILICON SIDEWALL GATES SELF ALIGNMENT PROCESS;

CAPACITANCE; ELECTRIC FIELD EFFECTS; GATES (TRANSISTOR); HOT CARRIERS; POLYCRYSTALS; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR DOPING; TRANSCONDUCTANCE;

THIN FILM TRANSISTORS;

EID: 84886448063     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)