1 Giga bit SOI DRAM with fully bulk compatible process and body-contacted SOI MOSFET structure

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 1997, Pages 579-582

  Koh, Yo Hwan ^a   Oh, Min Rok ^a   Lee, Jong Wook ^a   Yang, Ji Woon ^a   Lee, Won Chang ^a   Park, Chan Kwang ^a   Park, Jae Beom ^a   Heo, Yeon Cheol ^a   Rho, Kwang Myung ^a   Lee, Byung Cheol ^a   Chung, Myung Jun ^a   Huh, Min ^a   Kim, Hyung Suk ^a   Choi, Kyung Suk ^a   Lee, Won Chul ^a  

^a Hynix Semiconductor Inc   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC RANDOM ACCESS STORAGE (DRAM);

CAPACITANCE; CURRENT VOLTAGE CHARACTERISTICS; DELAY CIRCUITS; ELECTRIC BREAKDOWN OF SOLIDS; RANDOM ACCESS STORAGE; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR JUNCTIONS; SILICON ON INSULATOR TECHNOLOGY;

MOSFET DEVICES;

EID: 84886448032     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)