Selective-epitaxial SiGe HBT with SMI electrodes featuring 9.3-ps ECL-gate delay

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 1997, Pages 795-798

  Washio, Katsuyoshi ^a   Ohue, Eiji ^a   Oda, Katsuya ^a   Tanabe, Masamichi ^a   Shimamoto, Hiromi ^a   Onai, Takahiro ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

GATE DELAY; SELF ALIGNED STACKED METAL/IN SITU DOPED POLYSILICON (SMI) TECHNOLOGY;

CAPACITANCE; ELECTRIC RESISTANCE; ELECTRODES; EPITAXIAL GROWTH; GATES (TRANSISTOR); SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR DOPING; SEMICONDUCTOR GROWTH; SOLID STATE OSCILLATORS; SUBSTRATES;

HETEROJUNCTION BIPOLAR TRANSISTORS;

EID: 84886448021     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)