Hierarchical interconnect modeling

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 1997, Pages 125-128

  Chiprout, Eli ^a  

^a Austin Research Lab   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

HIERARCHICAL INTERCONNECT MODELING;

COMPUTER SIMULATION; LINEAR INTEGRATED CIRCUITS; LUMPED PARAMETER NETWORKS;

SEMICONDUCTOR DEVICE MODELS;

EID: 84886447974     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)