Design of self-timed asynchronous booth's multiplier

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2000, Pages 15-16

  Tang, Tin Yau ^a   Choy, Chin Sing ^a   Siu, Pui Lam ^a   Chan, Cheong Fat ^a  

^a CHINESE UNIVERSITY OF HONG KONG   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

AVERAGE CASE; BOOTH'S ALGORITHM; PARTIAL PRODUCT; SELF-TIMED;

COMPUTER AIDED DESIGN;

EID: 84884698223     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/368434.368480     Document Type: Conference Paper

References (5)

1. Shlomo Waser and Michael J. Flynn, "Introduction to Arithmetic for Digital Systems Designers", CBS College Publishing.
2. Scott Hauck, "Asynchronous Design Methodologies: An Overview", Proceedings of the IEEE, Vol. 83, No. 1, pp. 69-93, January 1995.
3. Feng LI, Oliver Chiu Sing CHOY and Cheong Fat CHAN, "SCCVSL: A Single-Rail CMOS Cascode Voltage Switch Logic"
4. Bruce Gilchrist, J.H. Pomerene and S.Y. Wong, "Fast Carry Logic for Digital Computers", IRE Transactions on Electronic Computers, Vol EC-4, pp 133-136, December 1955.
5. George W. Reitwiesner, "The Determination of carry Propagation Length for Binary Addition", IRE Transactions on Electronic Computers, Vol EC-9, pp 35-38, 1960.