Stochastic testing method for transistor-level uncertainty quantification based on generalized polynomial chaos

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 32, Issue 10, 2013, Pages 1533-1545

  Zhang, Zheng ^a   El Moselhy, Tarek A ^b   Elfadel, Ibrahim M ^c   Daniel, Luca ^a  

^a USA   (United States)

^b Massachusetts Institute of Technology Cambridge   (United States)

^c KHALIFA UNIVERSITY   (United Arab Emirates)

Author keywords

Generalized polynomial chaos; stochastic circuit simulation; stochastic testing method; uncertainty quantification; variation analysis

Indexed keywords

GENERALIZED POLYNOMIAL CHAOS; STOCHASTIC CIRCUITS; TESTING METHOD; UNCERTAINTY QUANTIFICATIONS; VARIATION ANALYSIS;

ALGORITHMS; ANALOG CIRCUITS; DIGITAL CIRCUITS; MATHEMATICAL MODELS; MONTE CARLO METHODS; POLYNOMIALS; STOCHASTIC SYSTEMS; TESTING; TIME DOMAIN ANALYSIS; UNCERTAINTY ANALYSIS;

CIRCUIT SIMULATION;

EID: 84884563945     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2013.2263039     Document Type: Article

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