A 5.4GS/s 12b 500mW pipeline ADC in 28nm CMOS

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2013, Pages

  Wu, Jiangfeng ^a   Chou, Acer ^a   Yang, Cheng Hsun ^a   Ding, Yen ^a   Ko, Yen Jen ^a   Lin, Sha Ting ^a   Liu, Wenbo ^a   Hsiao, Chi Ming ^a   Hsieh, Ming Hung ^a   Huang, Chun Cheng ^a   Hung, Juo Jung ^a   Kim, Kwang Young ^a   Le, Michael ^a   Li, Tianwei ^a   Shih, Wei Ta ^a   Shrivastava, Ayaskant ^a   Yang, Yau Cheng ^a   Chen, Chun Ying ^a   Huang, Hung Sen ^a  

^a BROADCOM CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

28NM CMOS; AMPLIFIER SHARING; HIGH SPEED; INPUT FREQUENCY; PING-PONGS; PIPELINE ADCS; SWITCHED-CAPACITOR AMPLIFIERS;

AMPLIFIERS (ELECTRONIC); VLSI CIRCUITS;

PIPELINES;

EID: 84883814580     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. K. Doris, E. Janssen et al., "A 480mw 2.6GS/s 10b 65nm CMOS Time-Interleaved ADC with 48.5dB SNDR up to Nyquist," ISSCC Dig. Tech. Papers, pp. 180-181, 2011.
2. C. Y. Chen, J. Wu et al., "A 12b 3GS/s Pipeline ADC with 0.4mm2 and 500mW in 40nm Digital CMOS," IEEE J. Solid-State Circuits, pp 1013-1021, Apr. 2012.
3. J. Wu, C. Y. Chen et al., "A 240mW 2.1GS/s 12b Pipeline ADC Using MDAC Equalization," IEEE CICC, 2012.