Simplifying FPGA design with a novel network-on-chip architecture

SRIF 2013 - Proceedings of the 2nd, 2013 ACM SIGCOMM Workshop on Software Radio Implementation Forum

Volumn , Issue , 2013, Pages 45-51

  Malsbury, John ^a   Ettus, Matt ^a  

^a Ettus Research   (United States)

Author keywords

FPGA; GNU Radio; Heterogeneous systems; High performance computing; SDR; Software defined radio; VITA 49; VRLP

Indexed keywords

GNU RADIO; HETEROGENEOUS SYSTEMS; HIGH-PERFORMANCE COMPUTING; SDR; SOFTWARE-DEFINED RADIOS; VITA-49; VRLP;

DESIGN; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTERNET PROTOCOLS; NETWORK ARCHITECTURE; RESEARCH; SOFTWARE RADIO; WIRELESS TELECOMMUNICATION SYSTEMS;

COMPUTER ARCHITECTURE;

EID: 84883674256     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2491246.2491251     Document Type: Conference Paper

References (3)

1. Bieberly, F.B., Heterogeneous Processing in Software Defined Radio: Flexible Implementation and Optimal Resource Mapping, February 8, 2012, Blacksburg, Virginia
2. Fayez, A., Designing a Software Defined Radio to Run on a Heterogenous Process, April 15, 2011, Blacksburg Virginia
3. Normoyle, R., VITA49 Enhances Capabilities and Interopability for Transporting SDR Data, April 2008, Retrieved on from: http://www.pentek.com/ VITA%2049.pdf?Filename=VITA%2049.pdf