Enhancement of switching margin by utilizing superior pinned layer stability for sub-20nm perpendicular STT-MRAM

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2013, Pages

  Lim, Woo Chang ^a   Lee, Y J ^a   Lee, J M ^a   Kim, W K ^a   Kim, J H ^a,a   Kim, K W ^a   Kim, K S ^a   Park, Y S ^a   Shin, H J ^a   Park, S H ^a   Jeong, J H ^a   Kang, M A ^a   Kim, Y H ^a   Kim, W J ^a   Kim, S Y ^a   Cho, Y C ^a   Park, H L ^a   Ahn, H S ^a   Park, J H ^a   Oh, S C ^a   Park, S O ^a   Jeong, S ^a   Nam, S W ^a   Kang, H K ^a   Jung, E S ^a   more..

^a SAMSUNG Electronics   (South Korea)

Author keywords

MRAM; pinned layer stability; switching margin

Indexed keywords

MAGNETIZATION SWITCHING; MRAM; NOVEL STRUCTURES; PERPENDICULAR MTJ; PINNED LAYERS; STT-MRAM; SWITCHING FIELD; SWITCHING VOLTAGES;

SWITCHING;

EID: 84883421565     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. W. J. Kim et al., IEEE International Electron Devices Meeting, pp. 24.1.1-24.1.4 (2011).
2. J. H. Park et al., IEEE Symposium on VLSI Technology, pp. 57-58 (2012).